Operational amplifiers such as differential amplifiers find applications in integrated circuits where voltage regulation is desired. For example, low dropout (LDO) voltage regulators may be designed using operational amplifiers and used for supplying a regulated voltage (which may be lower than a maximum supply voltage) to selected sections or components of an integrated circuit. An LDO voltage regulator may be a direct current (DC) linear voltage regulator that can operate with a very low dropout, where “dropout” or “dropout voltage” refers to the difference between an input voltage (e.g., maximum supply voltage received from a power supply rail) and the regulated output voltage.
LDO voltage regulators may be deployed, for example, in processing systems comprising one or more processing cores and/or one or more subsystems. Each core or subsystem may be configured for processing speeds specific to that core or subsystem, and so, there may be different power metrics for the various cores, subsystems, etc., of the processing system. For example, a core which is to be operated at its maximum performance level or highest operating frequency be connected to the maximum voltage supply, whereas the voltage supply can be reduced for a lower performance level/operating frequency. LDO voltage regulators may be used to supply a lower voltage (also referred to as a regulated voltage, herein) that is less than the maximum supply voltage to some cores or subsystems based on their individual power/voltage levels.
FIG. 1 illustrates processing system 100, shown to comprise multiple processing cores designated as cores 102a-d to illustrate aspects of different power/supply voltage levels across the various cores 102a-d (while it will be understood that a similar discussion is applicable to various subsystems of a core, such as a display, a modem, an audio controller, etc.) As shown, corresponding power head switches or block head switches (BHS) 106a-d are provided for cores 102a-d. BHS 106a-d may comprise one or more pull-up transistors or p-channel metal oxide semiconductor (PMOS) devices (not explicitly shown). When a BHS is turned on, it means the PMOS devices of the BHS are closed or turned on, causing positive maximum supply voltage Vdd 108 (which may be derived from an external voltage supply rail or “Vdd_ext”) to be supplied to the respective cores 102a-d. BHSs 106a-d can be selectively closed when corresponding cores 102a-d are to be operated at their maximum performance/frequency. When any BHS 106a-d is closed (or turned on), a corresponding LDO voltage regulator (or simply, “LDO” in this disclosure) 104a-d may be bypassed or put in “bypass” mode. Where a lower performance/frequency is acceptable for one or more cores 102a-d, their corresponding BHSs 106a-d are opened or turned off, and LDOs 104a-d are used to provide lower, regulated voltages to those cores 102a-d. 
A power controller such as power management integrated circuit (or “PMIC,” not specifically shown) can be integrated on the same chip as processing system 100 or located off-chip. The PMIC can be configured to control BHSs 106a-d and LDOs 104a-d, to supply lower voltages to cores 102a-d which are not operated at their highest performance/frequency. For example, the PMIC can turn on one or more BHSs 106a-d while placing corresponding LDOs 104a-d in bypass mode to provide maximum supply voltage; or turn off one or more BHSs 106a-d while utilizing corresponding LDOs 104a-d to supply lower voltage to corresponding cores 104a-d respectively.
LDOs 104a-d are conventionally designed with operational amplifiers or differential amplifiers, wherein, in the bypass mode, gates of input transistors of the differential amplifiers can be driven to disparate voltages. Over prolonged use, the disparate voltages can cause different levels of hot electrons to be injected into the gates of the complementary input transistors, which can lead to undesirable voltage offsets to appear between the gates of the input transistors. The offset voltages can lead to degraded performance of the LDOs 104a-d, thus reducing the life span of the LDOs. Accordingly, there is a corresponding need to extend the life of LDOs by mitigating or avoiding the detrimental effects of disparate voltages in the bypass mode of LDOs.